Hi. I'm Bruno Bodin.

Assistant professor at Yale-NUS, Singapore.
Previously, I was a Research Associate at University of Edinburgh from 2014-2018 and a Software Engineer at Kalray (Orsay, France) from 2011-2014 . I received M.S and Ph.D. in Computer Engineering from University of Pierre et Marie Curie (Paris, France) in 2010 and 2013. My major research interests are dataflow programming, compilers, static analysis, and scheduling . My application domains are signal processing, and robotics .

Contact: bruno._change_your_browser_bodin_remove_it_@yale-nus.edu.sg

Faust to FPGA

This project integrates a Synchronous Dataflow backend into the Faust language toolchain, enabling static analysis and synthesis of audio applications onto FPGA hardware.

Faust SDF3 Backend

An SDF3-compatible backend for the Faust DSP language, enabling performance modeling and static scheduling for embedded signal processing systems. Read more...

Spectrum: Software-defined Architecture for 5G

SPECTRUM is a software-defined array-based many-core architecture designed for predictable real-time processing in 5G baseband systems. It integrates lightweight hardware with a compiler flow based on SDF models.

ASCENT: Communication Scheduling for SDF on Bufferless NoC

ASCENT is a novel static scheduling approach for bufferless software-defined NoCs using the SDF model. It avoids over-conservatism in conventional TDM-based systems and improves throughput in real-time embedded applications. Read more...

SPECTRUM Compiler Flow for Baseband Processing

This compiler flow targets the SPECTRUM hardware architecture and supports predictable execution of baseband signal processing pipelines. It offers energy savings and timing guarantees using SDF-based modeling. Read more...

Dataset Generation and Benchmarking of SLAM Algorithms for Robotics and VR/AR

Synthetic datasets have gained an enormous amount of popularity in the computer vision community, from training and evaluation of Deep Learning-based methods to benchmarking Simultaneous Localization and Mapping (SLAM). Having the right tools to create customized datasets ... Read more...

The PAMELA project

Designing computer systems for the next generation many-core applications is an extremely challenging problem. The overall objective of this Programme is to bring together application developers, system software researchers and computer architects to ... Read more...

SLAMBench

Open source tool to assist in the development of SLAM algorithms. Read more...

SimBench

Simbench is a set of microbenchmarks designed to run on full system simulators, in ... Read more...

Diplomat

Taskgraph framework for performance estimation and CPU/GPU mapping. Read more...

Dataflow compilation for the Kalray MPPA-256

The Kalray MPPA-256 processor integrates 288 cores. Its SDK includes a C-based dataflow language, whose compiler fully automates the distributed execution of tasks across the processing, memory, communication and synchronization resources of the MPPA architecture.

Turbine

Turbine is a Dataflow graph generator. It can generate SDFGs, CSDFGs and PCGs with initialization phases. Read more...

IB+AGB5CSDF

Benchmark of CSDF from Auto-Generated and Industrial applications.

K-iter

K-iter is an open source tool to compute optimal throughput of CSDFG using an iterative algorithm. Read more...

Publications

Teaching

2012 - 2013 : Advanced Programming in C, Polytech (France).
2012 - 2014 : Elementary Algorithms, UPMC (France).
2016 - 2017 : Embedded Systems, University of Edinburgh (UK).
2018 - 2019 : System Programming in C, Yale-NUS College (Singapore).
2019 - 2025 : Programming for Data Science, Yale-NUS College (Singapore).
2019 - 2022 : Software Engineering, Yale-NUS College (Singapore).
2019 - 2024 : Operating Systems, Yale-NUS College (Singapore).
2022 - 2025 : Hardware Design, Yale-NUS College (Singapore).
2023 - 2024 : Introduction to Computer Science, Yale-NUS College (Singapore).

Find me on ...

Email: bruno._change_your_browser_bodin_remove_it_@yale-nus.edu.sg